vllm.models.kimi_k3.nvidia.specialized_decode.cutedsl.dsa.attn_sparse
¶
Specialized sparse MLA decode of a DCP K3.1 DSA layer on a per-tensor FP8 cache
(SparseDcpDecode): every rank's gathered query heads (the q mailbox) over this
rank's compacted flat KV rows (the exact top-k merge's rows / valid).
Why: at the latency checkpoint (DCP8, 5 verify rows) each row attends ~256 local keys. FlashInfer's prims_ts decode (split-KV over 80 CTAs plus its reduction, launched only after the merge: it reads its inputs before its PDL wait) and DcpValue's push of its rows hold the chain ~18 us at 3-25% DRAM for ~1 MB of KV. Here a cluster of SPLIT CTAs per (16 heads, row) splits the row's keys, launches early under PDL (reads nothing before its wait), merges its partials over DSMEM and pushes the merged rows straight into the owners' DcpValue mailbox.
Per CTA (row b, heads 16 m .. 16 m + 15, its 1 / SPLIT of the row's keys), per
chunk of up to CHUNK keys:
gather the Q rows (first chunk) and the chunk's KV rows (cp.async.bulk, one
per 576 B row, on one mbarrier); V rows past the count up to a 32-key
step are zeroed
QK warp w < CHUNK / 8: keys 8 w .. 8 w + 7 x the 16 heads, FP8 mma.sync
m16n8k32 (FP32 accumulation) over the 576 bytes
softmax the chunk's row max (shared memory), the running max, P =
exp2(s * scale_log2 - max + log2(448)) quantized to E4M3 (satfinite,
RN), FP32 sums of the unquantized P, the accumulators rescaled when the
running max rises
PV warp w: latent columns 32 w .. 32 w + 31, E4M3 P x E4M3 V (V transposed
in registers with byte permutes), FP32 accumulation
then the cluster merges (FP32): CTA s of the cluster takes columns s / SPLIT of the
16 heads, weights each CTA's partial by exp2(max_c - max), and writes
BF16(sum * k_scale / total) and LSE = max + log2(total / 448) (push: into the
owners' mailbox slot, base 2, as DcpValue's push; else the latent [B, Q, 512] and
natural-log LSE [B, Q] DcpValue reads).
Wide CTAs (tiles > 1, SPARSE_TILES): a CTA takes tiles such 16-head tiles
over the same keys. The KV rows it gathers feed every tile, QK runs on QK_WARPS
warps per tile (warps a one-tile CTA leaves idle in QK), each PV warp reuses its
transposed V fragments for every tile, and the CTA issues its q mailbox loads right
after the PDL wait. bulk (SPARSE_BULK): each CTA stages its partials of a
peer's columns in shared memory and moves them with one bulk shared::cluster copy
per peer instead of per-thread st.async stores. Per head and key the operations
and their order are unchanged (key split, chunks, QK chains, row maxima, P anchor
and rounding, sums in warp order, PV k-steps, the merge in CTA order) and the
partials move as the same FP32 bits, so both match the one-tile kernel bit for bit.
Precision: FlashInfer's sparse MLA decode (E4M3 query and cache, FP32 logits, E4M3 P at 448 of the running row max of its split, FP32 sums of the unquantized P, FP32 accumulation, one BF16 rounding of the output). FlashInfer's split-KV partials are BF16 (merged by its reduction); here they merge in FP32, so only the order of the sums, where the P scale anchors and the partials' rounding differ.
Rows of count 0 (padded rows; a rank owning none of a row's keys) write zeros and LSE -inf (pushed: only the LSE EMPTY_LSE).
Classes:
-
SparseDcpDecode–batchrows,headsgathered query heads (a multiple of 16tiles;
Functions:
-
compile_sparse–SparseDcpDecode of
batchrows (the q mailbox ofcaprows;push: -
run_sparse–query[cap, padded, 576] (FP8 bytes),kv[N, 576] (the flat cache -
sparse_for–Whether a DCP batch of
rowsruns SparseDcpDecode (gatheredquery -
sparse_layout–(head tiles per CTA, bulk exchange) of SparseDcpDecode over
batchrows of -
store_fp8_pair_shared–E4M3 (satfinite, RN) of
low,highas two bytes of shared memory. -
transpose4–Bytes of four words -> four words of bytes: out[j] = (w0.j, w1.j, w2.j,
SparseDcpDecode
¶
batch rows, heads gathered query heads (a multiple of 16 tiles;
the q mailbox and outputs hold padded rows per token), the merge's row width
width (its K). push (owner heads H, DCP, mailbox rows): push the
merged rows and base-2 LSEs into their owners' DcpValue "bf16" mailbox and
re-arm the q mailbox rows read (DcpValue pushed then only merges).
tiles: 16-head tiles per CTA; bulk: the cluster exchange as one bulk
copy per peer CTA (see the module docstring).
Methods:
-
merge–Columns split * COLS .. + COLS of head tile
t's 16 heads over the -
stage–bulk: this CTA's partials of every column (FP32 bits) into its own
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_sparse.py
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merge(args, inbox, stats, tile, split, b, tid, t)
¶
Columns split * COLS .. + COLS of head tile t's 16 heads over the
cluster's partials (FP32, in inbox / stats): thread i takes head
16 t + i // 32, 4 columns.
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_sparse.py
stage(inbox, staged, acc, split, warp, group, quarter)
¶
bulk: this CTA's partials of every column (FP32 bits) into its own
inbox block (its columns) or the staged block of their CTA (the
peers in CTA order without this one), visible to the bulk copies.
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_sparse.py
compile_sparse(batch, heads, padded, width, cap, device, push=None, tiles=None, bulk=None)
cached
¶
SparseDcpDecode of batch rows (the q mailbox of cap rows; push:
(owner heads, DCP) to push into the DcpValue mailbox; tiles / bulk:
sparse_layout's unless given).
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_sparse.py
run_sparse(kernel, query, kv, rows, valid, latent, lse, scale_log2, out_scale, push=None)
¶
query [cap, padded, 576] (FP8 bytes), kv [N, 576] (the flat cache
rows), rows [>= B, K] / valid: this rank's flat rows and counts ->
latent [B, padded, 512] BF16 and lse [B, padded] FP32 (first heads
heads), or with push (DcpMailbox, parity, rank) into the owners' mailbox.
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_sparse.py
sparse_for(rows, gathered, padded)
¶
Whether a DCP batch of rows runs SparseDcpDecode (gathered query
heads of a padded-row q mailbox).
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_sparse.py
sparse_layout(batch, heads, push=None)
¶
(head tiles per CTA, bulk exchange) of SparseDcpDecode over batch rows of
heads gathered heads: SPARSE_TILES / SPARSE_BULK of the pushing decode's
DCP size (push: (owner heads, DCP)), else (1, False).
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_sparse.py
store_fp8_pair_shared(pointer, low, high)
¶
E4M3 (satfinite, RN) of low, high as two bytes of shared memory.
Source code in vllm/models/kimi_k3/nvidia/specialized_decode/cutedsl/dsa/attn_sparse.py
transpose4(w)
¶
Bytes of four words -> four words of bytes: out[j] = (w0.j, w1.j, w2.j, w3.j), byte 0 the lowest.